1. Technical Field
The present invention relates to integrated circuit migration and, more particularly, to methods and systems for migrating an integrated circuit layout from a first fabrication technology to a second fabrication technology.
2. Description of the Related Art
Integrated circuit (IC) layout is usually designed and organized hierarchically. The hierarchical representation of IC layout not only carries the designers' intent and enables a “divide-and-conquer” design principle, but also makes design checking and verification easier. Typically, a modern microprocessor includes a number of separate functional units. Each unit further includes a number of macros. A macro itself may again include a number of levels of design hierarchy with different orientations of cell placement. Array macros (such as static random access memory (SRAM) arrays) belong to a special kind of macros, which are highly structural. For example, an SRAM array contains a stack of SRAM bit cells and the pitch-matching circuits. In an SRAM bit stack, a SRAM bit cell is placed repeatedly. A horizontally pitch-matching circuit is called a “word decoder” and a vertically pitch-matching circuit is called “IO”/“bit decoder.” This kind of macro is referred to as “structural layout.” Structural layout may not be limited to array macros.
Most often, array macros are in the timing critical path. Therefore, array macros are traditionally custom-designed to achieve density and performance. However, custom design is very time-consuming and resource-consuming. When migrating from one fabrication technology to a newer, more efficient technology, array macros must often be completely redesigned to accommodate the requirements and allowances of the new technology, imposing a high burden on designers.